Processor Architectures in Data Base Problems

Authors

  • Rakhimov Bakhtiyar Saidovich Head of the Department of Biophysics and information technologies of Urgench branch of Tashkent Medical Academy, Uzbekistan
  • Bekchanov Bakhtiyar Gafurovich Head of the Department of Children's propaedeutics
  • Jumaniyazova Tupajon Alimovna Senior teacher of the Department of Biophysics and information technologies of Urgench branch of Tashkent Medical Academy, Uzbekistan
  • Saidov Atabek Bakhtiyarovich student 4 – course Urgench branch of Tashkent University of Information Technologies named after Muhammad al Khwarizmi, Uzbekistan

Keywords:

Computer, Information technology, digital signal processing, mathematical models, network

Abstract

Computer vision as a scientific discipline refers to the theories and technologies for creating medical database systems that receive information from an image. Despite the fact that this discipline is quite young, its results have penetrated almost all areas of life. Computer vision is closely related to other practical areas like image processing, the input of which is two-dimensional images obtained from a camera or artificially created. This form of image transformation is aimed at noise suppression, filtering, color correction and image analysis, which allows you to directly obtain specific information from the processed image. This information may include searching for objects, feature points, segments, etc. All scalar processors operate in SIMD mode, while executing a block of threads in the G80, the number of threads in a block is 32, called a warp. At the same time, in 4 clock cycles of the multiprocessor, all beam streams are processed at once when performing operations with floating point, with double precision - in 32 clock cycles, and transcendental functions - in 16 clock cycles. The number of threads per multiprocessor is limited. To synchronize the threads, special instructions have been developed that interrupt the execution of a bundle and start the next bundles in the queue until all bundles are interrupted. Due to this mechanism, threshold synchronization is achieved with a minimum amount of time. It is usually designed for communication between scalar processors via shared memory.

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Published

2022-10-18

How to Cite

Saidovich, R. B. ., Gafurovich, B. B. ., Alimovna, J. T. ., & Bakhtiyarovich, S. A. . (2022). Processor Architectures in Data Base Problems. Procedia of Engineering and Medical Sciences, 43–47. Retrieved from https://procedia.online/index.php/engineering/article/view/208

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